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Independent SDK for the Sega Dreamcast
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Event code values for AICA events More...

Macros

#define ASIC_EVT_SPU_DMA   0x000f
 SPU (G2 channel 0) DMA complete.
 
#define ASIC_EVT_SPU_IRQ   0x0101
 SPU interrupt.
 

Detailed Description

Event code values for AICA events

These are events that the SPU (AICA) generates that can be hooked.

Macro Definition Documentation

◆ ASIC_EVT_SPU_DMA

#define ASIC_EVT_SPU_DMA   0x000f

SPU (G2 channel 0) DMA complete.

◆ ASIC_EVT_SPU_IRQ

#define ASIC_EVT_SPU_IRQ   0x0101

SPU interrupt.