Polygon header constants and masks
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#define | PVR_TA_CMD_TYPE GENMASK(26, 24) |
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#define | PVR_TA_CMD_USERCLIP GENMASK(17, 16) |
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#define | PVR_TA_CMD_MODIFIER BIT(7) |
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#define | PVR_TA_CMD_MODIFIERMODE BIT(6) |
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#define | PVR_TA_CMD_CLRFMT GENMASK(5, 4) |
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#define | PVR_TA_CMD_TXRENABLE BIT(3) |
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#define | PVR_TA_CMD_SPECULAR BIT(2) |
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#define | PVR_TA_CMD_SHADE BIT(1) |
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#define | PVR_TA_CMD_UVFMT BIT(0) |
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#define | PVR_TA_PM1_DEPTHCMP GENMASK(31, 29) |
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#define | PVR_TA_PM1_CULLING GENMASK(28, 27) |
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#define | PVR_TA_PM1_DEPTHWRITE BIT(26) |
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#define | PVR_TA_PM1_TXRENABLE BIT(25) |
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#define | PVR_TA_PM1_MODIFIERINST GENMASK(30, 29) |
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#define | PVR_TA_PM2_SRCBLEND GENMASK(31, 29) |
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#define | PVR_TA_PM2_DSTBLEND GENMASK(28, 26) |
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#define | PVR_TA_PM2_SRCENABLE BIT(25) |
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#define | PVR_TA_PM2_DSTENABLE BIT(24) |
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#define | PVR_TA_PM2_FOG GENMASK(23, 22) |
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#define | PVR_TA_PM2_CLAMP BIT(21) |
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#define | PVR_TA_PM2_ALPHA BIT(20) |
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#define | PVR_TA_PM2_TXRALPHA BIT(19) |
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#define | PVR_TA_PM2_UVFLIP GENMASK(18, 17) |
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#define | PVR_TA_PM2_UVCLAMP GENMASK(16, 15) |
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#define | PVR_TA_PM2_FILTER GENMASK(14, 12) |
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#define | PVR_TA_PM2_MIPBIAS GENMASK(11, 8) |
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#define | PVR_TA_PM2_TXRENV GENMASK(7, 6) |
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#define | PVR_TA_PM2_USIZE GENMASK(5, 3) |
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#define | PVR_TA_PM2_VSIZE GENMASK(2, 0) |
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#define | PVR_TA_PM3_MIPMAP BIT(31) |
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#define | PVR_TA_PM3_TXRFMT GENMASK(30, 21) |
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Polygon header constants and masks
Note that thanks to the arrangement of constants, this is mainly a matter of bit shifting to compile headers...
◆ PVR_TA_CMD_CLRFMT
#define PVR_TA_CMD_CLRFMT GENMASK(5, 4) |
◆ PVR_TA_CMD_MODIFIER
#define PVR_TA_CMD_MODIFIER BIT(7) |
◆ PVR_TA_CMD_MODIFIERMODE
#define PVR_TA_CMD_MODIFIERMODE BIT(6) |
◆ PVR_TA_CMD_SHADE
#define PVR_TA_CMD_SHADE BIT(1) |
◆ PVR_TA_CMD_SPECULAR
#define PVR_TA_CMD_SPECULAR BIT(2) |
◆ PVR_TA_CMD_TXRENABLE
#define PVR_TA_CMD_TXRENABLE BIT(3) |
◆ PVR_TA_CMD_TYPE
#define PVR_TA_CMD_TYPE GENMASK(26, 24) |
◆ PVR_TA_CMD_USERCLIP
#define PVR_TA_CMD_USERCLIP GENMASK(17, 16) |
◆ PVR_TA_CMD_UVFMT
#define PVR_TA_CMD_UVFMT BIT(0) |
◆ PVR_TA_PM1_CULLING
#define PVR_TA_PM1_CULLING GENMASK(28, 27) |
◆ PVR_TA_PM1_DEPTHCMP
#define PVR_TA_PM1_DEPTHCMP GENMASK(31, 29) |
◆ PVR_TA_PM1_DEPTHWRITE
#define PVR_TA_PM1_DEPTHWRITE BIT(26) |
◆ PVR_TA_PM1_MODIFIERINST
#define PVR_TA_PM1_MODIFIERINST GENMASK(30, 29) |
◆ PVR_TA_PM1_TXRENABLE
#define PVR_TA_PM1_TXRENABLE BIT(25) |
◆ PVR_TA_PM2_ALPHA
#define PVR_TA_PM2_ALPHA BIT(20) |
◆ PVR_TA_PM2_CLAMP
#define PVR_TA_PM2_CLAMP BIT(21) |
◆ PVR_TA_PM2_DSTBLEND
#define PVR_TA_PM2_DSTBLEND GENMASK(28, 26) |
◆ PVR_TA_PM2_DSTENABLE
#define PVR_TA_PM2_DSTENABLE BIT(24) |
◆ PVR_TA_PM2_FILTER
#define PVR_TA_PM2_FILTER GENMASK(14, 12) |
◆ PVR_TA_PM2_FOG
#define PVR_TA_PM2_FOG GENMASK(23, 22) |
◆ PVR_TA_PM2_MIPBIAS
#define PVR_TA_PM2_MIPBIAS GENMASK(11, 8) |
◆ PVR_TA_PM2_SRCBLEND
#define PVR_TA_PM2_SRCBLEND GENMASK(31, 29) |
◆ PVR_TA_PM2_SRCENABLE
#define PVR_TA_PM2_SRCENABLE BIT(25) |
◆ PVR_TA_PM2_TXRALPHA
#define PVR_TA_PM2_TXRALPHA BIT(19) |
◆ PVR_TA_PM2_TXRENV
#define PVR_TA_PM2_TXRENV GENMASK(7, 6) |
◆ PVR_TA_PM2_USIZE
#define PVR_TA_PM2_USIZE GENMASK(5, 3) |
◆ PVR_TA_PM2_UVCLAMP
#define PVR_TA_PM2_UVCLAMP GENMASK(16, 15) |
◆ PVR_TA_PM2_UVFLIP
#define PVR_TA_PM2_UVFLIP GENMASK(18, 17) |
◆ PVR_TA_PM2_VSIZE
#define PVR_TA_PM2_VSIZE GENMASK(2, 0) |
◆ PVR_TA_PM3_MIPMAP
#define PVR_TA_PM3_MIPMAP BIT(31) |
◆ PVR_TA_PM3_TXRFMT
#define PVR_TA_PM3_TXRFMT GENMASK(30, 21) |