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ubc.h
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1/* KallistiOS ##version##
2
3 kernel/arch/dreamcast/include/dc/ubc.h
4 Copyright (C) 2024 Falco Girgis
5*/
6
7/** \file dc/ubc.h
8 \brief User Break Controller Driver
9 \ingroup ubc
10
11 This file provides a driver and API around the SH4's UBC.
12
13 \sa arch/gdb.h
14
15 \todo
16 Add support for using the DBR register as the breakpoint handler.
17
18 \author Falco Girgis
19*/
20
21#ifndef __DC_UBC_H
22#define __DC_UBC_H
23
24#include <kos/cdefs.h>
25__BEGIN_DECLS
26
27#include <stdbool.h>
28#include <stdint.h>
29
30/** \defgroup ubc User Break Controller
31 \brief Driver for the SH4's UBC
32 \ingroup debugging
33
34 The SH4's User Break Controller (UBC) is a CPU peripheral which facilitates
35 low-level software debugging. It provides two different channels which can
36 be configured to monitor for certain memory or instruction conditions
37 before generating a user-break interrupt. It provides the foundation for
38 creating software-based debuggers and is the backing driver for the GDB
39 debug stub.
40
41 The following break comparison conditions are supported:
42 - Address with optional ASID and 10, 12, 16, and 20-bit mask:
43 supporting breaking on ranges of addresses and MMU operation.
44 - Bus Cycle: supporting instruction or operand (data) breakpoints
45 - Read/Write: supporting R, W, or RW access conditions.
46 - Operand size: byte, word, longword, quadword
47 - Data: 32-bit value with 32-bit mask for breaking on specific values
48 or ranges of values (ubc_channel_b only).
49 - Pre or Post-Instruction breaking
50
51 \warning
52 This Driver is used internally by the GDB stub, so care must be taken to
53 not utilize the UBC during a GDB debugging session!
54
55 @{
56*/
57
58/** \cond Forward declarations */
59struct irq_context;
60/** \endcond */
61
62/** \brief UBC address mask specifier
63
64 This value specifies which of the low bits are masked off and not included
65 from ubc_breakpoint_t::address when configuring a breakpoint. By default,
66 address masking is disabled, and the exact address given by
67 ubc_breakpoint_t::address will be matched.
68
69 \remark
70 Using a mask allows you to break on a \a range of instructions or
71 addresses.
72*/
73typedef enum ubc_address_mask {
74 ubc_address_mask_none, /**< \brief Disable masking, all bits used */
75 ubc_address_mask_10, /**< \brief Mask off low 10 bits */
76 ubc_address_mask_12, /**< \brief Mask off low 12 bits */
77 ubc_address_mask_16, /**< \brief Mask off low 16 bits */
78 ubc_address_mask_20, /**< \brief Mask off low 20 bits */
79 ubc_address_mask_all /**< \brief Mask off all bits */
81
82/** \brief UBC access condition type specifier
83
84 This value specifies whether to break when the address given by
85 ubc_breakpoint_t::address is used as as an instruction, an operand, or
86 either.
87
88 \note
89 Instruction access is an access that obtains an instruction while operand
90 access is any memory access for the purpose of instruction execution. The
91 default value is either access type.
92*/
93typedef enum ubc_access {
94 ubc_access_either, /**< \brief Instruction or operand */
95 ubc_access_instruction, /**< \brief Instruction */
96 ubc_access_operand /**< \brief Operand */
98
99/** \brief UBC read/write condition type specifier
100
101 This value is used with operand-access breakpoints to further specify
102 whether to break on read, write, or either access. The default value is
103 either read or write.
104*/
105typedef enum ubc_rw {
106 ubc_rw_either, /**< \brief Read or write */
107 ubc_rw_read, /**< \brief Read-only */
108 ubc_rw_write /**< \brief Write-only */
110
111/** \brief UBC size condition type specifier
112
113 This value is used with operand-access breakpoints to further specify
114 the size of the operand access to trigger the break condition. It defaults
115 to breaking on any size.
116*/
117typedef enum ubc_size {
118 ubc_size_any, /**< \brief Any sizes */
119 ubc_size_8bit, /**< \brief Byte sizes */
120 ubc_size_16bit, /**< \brief Word sizes */
121 ubc_size_32bit, /**< \brief Longword sizes */
122 ubc_size_64bit /**< \brief Quadword sizes */
124
125/** \brief UBC breakpoint structure
126
127 This structure contains all of the information needed to configure a
128 breakpoint using the SH4's UBC. It is meant to be zero-initialized,
129 with the most commonly preferred, general values being the defaults,
130 so that the only member that must be initialized to a non-zero value is
131 ubc_breakpoint_t::address.
132
133 \note
134 The default configuration (from zero initialization) will trigger a
135 breakpoint with any access to ubc_breakpoint_t::address.
136
137 \warning
138 When using ubc_breakpoint_t::asid or ubc_breakpoint_t::data, do not forget
139 to set their respective `enable` members!
140*/
141typedef struct ubc_breakpoint {
142 /** \brief Target address
143
144 Address used as the target or base memory address of a breakpoint.
145 */
146 void *address;
147
148 /** \brief Address mask
149
150 Controls which of the low bits of ubc_breakpoint_t::address get
151 excluded from the address comparison.
152
153 \note
154 This is used to create a breakpoint on a range of addresses.
155 */
157
158 /** \brief Access type
159
160 Controls which type of access to the target address(es) to break on.
161 */
163
164 /** \brief Instruction access type settings
165
166 Contains settings which are specific to instruction (or either) type
167 accesses.
168 */
169 struct {
170 /** \brief Break before instruction execution
171
172 Causes the breakpoint to be triggered just before the target
173 instruction is actually executed.
174
175 \warning
176 Be careful when breaking before an instruction and returning
177 "false" in your handler callback, as this can cause an infinite
178 loop while the instruction gets repeatedly executed, repeatedly
179 triggering your breakpoint handler.
180 */
182 } instruction;
183
184 /** \brief Operand access type settings
185
186 Contains settings which are specific to operand (or either) type
187 accesses.
188 */
189 struct {
190 /** \brief Read/write condition
191
192 Controls read/write condition for operand-access breakpoints
193 */
195
196 /** \brief Size condition
197
198 Controls size condition for operand-access breakpoints
199 */
201
202 /** \brief Optional operand data settings
203
204 These settings allow for triggering an operand-access breakpoint on
205 a particular value or range of values.
206
207 \warning
208 Only a single breakpoint utilizing data comparison settings may be
209 active at a time, due to UBC channel limitations.
210 */
211 struct {
212 /** \brief Enables data value comparisons
213
214 Must be enabled for data value comparisons to be used.
215 */
217
218 /** \brief Data value for operand accesses
219
220 Value to use for data comparisons with operand-access
221 breakpoints.
222
223 \note
224 Since this field and its mask are only 32 bits wide, it will be
225 compared to both the high and low 32-bits when using 64-bit
226 operand sizes.
227 */
228 uint32_t value;
229
230 /** \brief Exclusion mask for data value comparison
231
232 Controls which bits get masked off and excluded from
233 operand-access value comparisons.
234
235 \note
236 This is used to break on a range of values.
237 */
238 uint32_t mask;
239 } data;
240
241 } operand;
242
243 /** \brief Optional ASID settings
244
245 These settings are used used when the MMU is enabled to distinguish
246 between memory pages with the same virtual address.
247 */
248 struct {
249 /** \brief Enables ASID value comparisons
250
251 Must be enabled for ASID values to be used.
252 */
253 bool enabled;
254
255 /** \brief ASID value
256
257 Sets the required ASID value for the virtual address given by
258 ubc_breakpoint_t::address to match for a particular breakpoint.
259 */
260 uint8_t value;
261 } asid;
262
263 /** \brief Next breakpoint in the sequence
264
265 Allows you to chain up to two breakpoint conditions together, creating
266 a sequential breakpoint.
267
268 \warning
269 You can only ever have a single sequential breakpoint active at a time,
270 with no other regular breakpoints active, as it requires both UBC
271 channels to be in-use simultaneously.
272
273 \warning
274 Data comparison can only be used in the second breakpoint of a
275 sequence.
276
277 \warning
278 When using a sequential breakpoint, the instructions triggering the
279 first and second conditions must be \a { at least } 4 instructions away.
280 */
281 struct ubc_breakpoint *next;
283
284/** \brief Breakpoint user callback
285
286 Typedef for the user function to be invoked upon encountering a breakpoint.
287
288 \warning
289 This callback is invoked within the context of an interrupt handler!
290
291 \param bp Breakpoint that was encountered
292 \param ctx Context of the current interrupt
293 \param user_data User-supplied arbitrary callback data
294
295 \retval true Remove the breakpoint upon callback completion
296 \retval false Leave the breakpoint active upon callback completion
297
298 \sa ubc_add_breakpoint()
299*/
300typedef bool (*ubc_break_func_t)(const ubc_breakpoint_t *bp,
301 const struct irq_context *ctx,
302 void *user_data);
303
304/** \brief Enables a breakpoint
305
306 Reserves a channel within the UBC for the given breakpoint.
307
308 \param bp Configuration details for the breakpoint
309 \param callback Handler which gets called upon breakpoint condition
310 \param user_data Optional data to pass back to \p callback handler
311
312 \retval true The breakpoint was set successfully
313 \retval false The breakpoint failed to be set due to:
314 - Invalid configuration
315 - No available channel
316
317 \sa ubc_remove_breakpoint()
318*/
320 ubc_break_func_t callback,
321 void *user_data);
322
323/** \brief Disables a breakpoint
324
325 Removes a breakpoint from the UBC, freeing up a channel.
326
327 \param bp The breakpoint to remove
328
329 \retval true The breakpoint was successfully removed
330 \retval false The breakpoint was not found
331
332 \sa ubc_add_breakpoint(), ubc_clear_breakpoints()
333*/
335
336/** \brief Disables all active breakpoints
337
338 Removes any breakpoints from the UBC, freeing up all channels.
339
340 \note
341 This is automatically called for you upon program termination.
342
343 \sa ubc_remove_breakpoint()
344*/
346
347/** \cond Called internally by KOS. */
348void ubc_init(void);
349void ubc_shutdown(void);
350/** \endcond */
351
352/** @} */
353
354__END_DECLS
355
356#endif /* __DC_UBC_H */
Definitions for builtin attributes and compiler directives.
void ubc_clear_breakpoints(void)
Disables all active breakpoints.
bool(* ubc_break_func_t)(const ubc_breakpoint_t *bp, const struct irq_context *ctx, void *user_data)
Breakpoint user callback.
Definition ubc.h:300
ubc_access_t
UBC access condition type specifier.
Definition ubc.h:93
ubc_rw_t
UBC read/write condition type specifier.
Definition ubc.h:105
bool ubc_add_breakpoint(const ubc_breakpoint_t *bp, ubc_break_func_t callback, void *user_data)
Enables a breakpoint.
bool ubc_remove_breakpoint(const ubc_breakpoint_t *bp)
Disables a breakpoint.
ubc_size_t
UBC size condition type specifier.
Definition ubc.h:117
ubc_address_mask_t
UBC address mask specifier.
Definition ubc.h:73
@ ubc_access_instruction
Instruction.
Definition ubc.h:95
@ ubc_access_operand
Operand.
Definition ubc.h:96
@ ubc_access_either
Instruction or operand.
Definition ubc.h:94
@ ubc_rw_either
Read or write.
Definition ubc.h:106
@ ubc_rw_read
Read-only.
Definition ubc.h:107
@ ubc_rw_write
Write-only.
Definition ubc.h:108
@ ubc_size_64bit
Quadword sizes.
Definition ubc.h:122
@ ubc_size_16bit
Word sizes.
Definition ubc.h:120
@ ubc_size_8bit
Byte sizes.
Definition ubc.h:119
@ ubc_size_32bit
Longword sizes.
Definition ubc.h:121
@ ubc_size_any
Any sizes.
Definition ubc.h:118
@ ubc_address_mask_12
Mask off low 12 bits.
Definition ubc.h:76
@ ubc_address_mask_16
Mask off low 16 bits.
Definition ubc.h:77
@ ubc_address_mask_all
Mask off all bits.
Definition ubc.h:79
@ ubc_address_mask_10
Mask off low 10 bits.
Definition ubc.h:75
@ ubc_address_mask_20
Mask off low 20 bits.
Definition ubc.h:78
@ ubc_address_mask_none
Disable masking, all bits used.
Definition ubc.h:74
UBC breakpoint structure.
Definition ubc.h:141
struct ubc_breakpoint * next
Next breakpoint in the sequence.
Definition ubc.h:281
ubc_size_t size
Size condition.
Definition ubc.h:200
ubc_access_t access
Access type.
Definition ubc.h:162
bool break_before
Break before instruction execution.
Definition ubc.h:181
bool enabled
Enables data value comparisons.
Definition ubc.h:216
ubc_address_mask_t address_mask
Address mask.
Definition ubc.h:156
void * address
Target address.
Definition ubc.h:146
uint32_t value
Data value for operand accesses.
Definition ubc.h:228
ubc_rw_t rw
Read/write condition.
Definition ubc.h:194
uint32_t mask
Exclusion mask for data value comparison.
Definition ubc.h:238
uint8_t value
ASID value.
Definition ubc.h:260