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Independent SDK for the Sega Dreamcast
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ubc.h
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1/* KallistiOS ##version##
2
3 kernel/arch/dreamcast/include/dc/ubc.h
4 Copyright (C) 2024 Falco Girgis
5*/
6
7/** \file dc/ubc.h
8 \brief User Break Controller Driver
9 \ingroup ubc
10
11 This file provides a driver and API around the SH4's UBC.
12
13 \sa arch/gdb.h
14
15 \todo
16 Add support for using the DBR register as the breakpoint handler.
17
18 \author Falco Girgis
19*/
20
21#ifndef __DC_UBC_H
22#define __DC_UBC_H
23
24#include <kos/cdefs.h>
25__BEGIN_DECLS
26
27#include <stdbool.h>
28#include <stdint.h>
29#include <arch/irq.h>
30
31/** \defgroup ubc User Break Controller
32 \brief Driver for the SH4's UBC
33 \ingroup debugging
34
35 The SH4's User Break Controller (UBC) is a CPU peripheral which facilitates
36 low-level software debugging. It provides two different channels which can
37 be configured to monitor for certain memory or instruction conditions
38 before generating a user-break interrupt. It provides the foundation for
39 creating software-based debuggers and is the backing driver for the GDB
40 debug stub.
41
42 The following break comparison conditions are supported:
43 - Address with optional ASID and 10, 12, 16, and 20-bit mask:
44 supporting breaking on ranges of addresses and MMU operation.
45 - Bus Cycle: supporting instruction or operand (data) breakpoints
46 - Read/Write: supporting R, W, or RW access conditions.
47 - Operand size: byte, word, longword, quadword
48 - Data: 32-bit value with 32-bit mask for breaking on specific values
49 or ranges of values (ubc_channel_b only).
50 - Pre or Post-Instruction breaking
51
52 \warning
53 This Driver is used internally by the GDB stub, so care must be taken to
54 not utilize the UBC during a GDB debugging session!
55
56 @{
57*/
58
59/** \brief UBC address mask specifier
60
61 This value specifies which of the low bits are masked off and not included
62 from ubc_breakpoint_t::address when configuring a breakpoint. By default,
63 address masking is disabled, and the exact address given by
64 ubc_breakpoint_t::address will be matched.
65
66 \remark
67 Using a mask allows you to break on a \a range of instructions or
68 addresses.
69*/
70typedef enum ubc_address_mask {
71 ubc_address_mask_none, /**< \brief Disable masking, all bits used */
72 ubc_address_mask_10, /**< \brief Mask off low 10 bits */
73 ubc_address_mask_12, /**< \brief Mask off low 12 bits */
74 ubc_address_mask_16, /**< \brief Mask off low 16 bits */
75 ubc_address_mask_20, /**< \brief Mask off low 20 bits */
76 ubc_address_mask_all /**< \brief Mask off all bits */
78
79/** \brief UBC access condition type specifier
80
81 This value specifies whether to break when the address given by
82 ubc_breakpoint_t::address is used as as an instruction, an operand, or
83 either.
84
85 \note
86 Instruction access is an access that obtains an instruction while operand
87 access is any memory access for the purpose of instruction execution. The
88 default value is either access type.
89*/
90typedef enum ubc_access {
91 ubc_access_either, /**< \brief Instruction or operand */
92 ubc_access_instruction, /**< \brief Instruction */
93 ubc_access_operand /**< \brief Operand */
95
96/** \brief UBC read/write condition type specifier
97
98 This value is used with operand-access breakpoints to further specify
99 whether to break on read, write, or either access. The default value is
100 either read or write.
101*/
102typedef enum ubc_rw {
103 ubc_rw_either, /**< \brief Read or write */
104 ubc_rw_read, /**< \brief Read-only */
105 ubc_rw_write /**< \brief Write-only */
107
108/** \brief UBC size condition type specifier
109
110 This value is used with operand-access breakpoints to further specify
111 the size of the operand access to trigger the break condition. It defaults
112 to breaking on any size.
113*/
114typedef enum ubc_size {
115 ubc_size_any, /**< \brief Any sizes */
116 ubc_size_8bit, /**< \brief Byte sizes */
117 ubc_size_16bit, /**< \brief Word sizes */
118 ubc_size_32bit, /**< \brief Longword sizes */
119 ubc_size_64bit /**< \brief Quadword sizes */
121
122/** \brief UBC breakpoint structure
123
124 This structure contains all of the information needed to configure a
125 breakpoint using the SH4's UBC. It is meant to be zero-initialized,
126 with the most commonly preferred, general values being the defaults,
127 so that the only member that must be initialized to a non-zero value is
128 ubc_breakpoint_t::address.
129
130 \note
131 The default configuration (from zero initialization) will trigger a
132 breakpoint with any access to ubc_breakpoint_t::address.
133
134 \warning
135 When using ubc_breakpoint_t::asid or ubc_breakpoint_t::data, do not forget
136 to set their respective `enable` members!
137*/
138typedef struct ubc_breakpoint {
139 /** \brief Target address
140
141 Address used as the target or base memory address of a breakpoint.
142 */
143 void *address;
144
145 /** \brief Address mask
146
147 Controls which of the low bits of ubc_breakpoint_t::address get
148 excluded from the address comparison.
149
150 \note
151 This is used to create a breakpoint on a range of addresses.
152 */
154
155 /** \brief Access type
156
157 Controls which type of access to the target address(es) to break on.
158 */
160
161 /** \brief Instruction access type settings
162
163 Contains settings which are specific to instruction (or either) type
164 accesses.
165 */
166 struct {
167 /** \brief Break before instruction execution
168
169 Causes the breakpoint to be triggered just before the target
170 instruction is actually executed.
171
172 \warning
173 Be careful when breaking before an instruction and returning
174 "false" in your handler callback, as this can cause an infinite
175 loop while the instruction gets repeatedly executed, repeatedly
176 triggering your breakpoint handler.
177 */
179 } instruction;
180
181 /** \brief Operand access type settings
182
183 Contains settings which are specific to operand (or either) type
184 accesses.
185 */
186 struct {
187 /** \brief Read/write condition
188
189 Controls read/write condition for operand-access breakpoints
190 */
192
193 /** \brief Size condition
194
195 Controls size condition for operand-access breakpoints
196 */
198
199 /** \brief Optional operand data settings
200
201 These settings allow for triggering an operand-access breakpoint on
202 a particular value or range of values.
203
204 \warning
205 Only a single breakpoint utilizing data comparison settings may be
206 active at a time, due to UBC channel limitations.
207 */
208 struct {
209 /** \brief Enables data value comparisons
210
211 Must be enabled for data value comparisons to be used.
212 */
214
215 /** \brief Data value for operand accesses
216
217 Value to use for data comparisons with operand-access
218 breakpoints.
219
220 \note
221 Since this field and its mask are only 32 bits wide, it will be
222 compared to both the high and low 32-bits when using 64-bit
223 operand sizes.
224 */
225 uint32_t value;
226
227 /** \brief Exclusion mask for data value comparison
228
229 Controls which bits get masked off and excluded from
230 operand-access value comparisons.
231
232 \note
233 This is used to break on a range of values.
234 */
235 uint32_t mask;
236 } data;
237
238 } operand;
239
240 /** \brief Optional ASID settings
241
242 These settings are used used when the MMU is enabled to distinguish
243 between memory pages with the same virtual address.
244 */
245 struct {
246 /** \brief Enables ASID value comparisons
247
248 Must be enabled for ASID values to be used.
249 */
250 bool enabled;
251
252 /** \brief ASID value
253
254 Sets the required ASID value for the virtual address given by
255 ubc_breakpoint_t::address to match for a particular breakpoint.
256 */
257 uint8_t value;
258 } asid;
259
260 /** \brief Next breakpoint in the sequence
261
262 Allows you to chain up to two breakpoint conditions together, creating
263 a sequential breakpoint.
264
265 \warning
266 You can only ever have a single sequential breakpoint active at a time,
267 with no other regular breakpoints active, as it requires both UBC
268 channels to be in-use simultaneously.
269
270 \warning
271 Data comparison can only be used in the second breakpoint of a
272 sequence.
273
274 \warning
275 When using a sequential breakpoint, the instructions triggering the
276 first and second conditions must be \a { at least } 4 instructions away.
277 */
278 struct ubc_breakpoint *next;
280
281/** \brief Breakpoint user callback
282
283 Typedef for the user function to be invoked upon encountering a breakpoint.
284
285 \warning
286 This callback is invoked within the context of an interrupt handler!
287
288 \param bp Breakpoint that was encountered
289 \param ctx Context of the current interrupt
290 \param user_data User-supplied arbitrary callback data
291
292 \retval true Remove the breakpoint upon callback completion
293 \retval false Leave the breakpoint active upon callback completion
294
295 \sa ubc_add_breakpoint()
296*/
297typedef bool (*ubc_break_func_t)(const ubc_breakpoint_t *bp,
298 const irq_context_t *ctx,
299 void *user_data);
300
301/** \brief Enables a breakpoint
302
303 Reserves a channel within the UBC for the given breakpoint.
304
305 \param bp Configuration details for the breakpoint
306 \param callback Handler which gets called upon breakpoint condition
307 \param user_data Optional data to pass back to \p callback handler
308
309 \retval true The breakpoint was set successfully
310 \retval false The breakpoint failed to be set due to:
311 - Invalid configuration
312 - No available channel
313
314 \sa ubc_remove_breakpoint()
315*/
317 ubc_break_func_t callback,
318 void *user_data);
319
320/** \brief Disables a breakpoint
321
322 Removes a breakpoint from the UBC, freeing up a channel.
323
324 \param bp The breakpoint to remove
325
326 \retval true The breakpoint was successfully removed
327 \retval false The breakpoint was not found
328
329 \sa ubc_add_breakpoint(), ubc_clear_breakpoints()
330*/
332
333/** \brief Disables all active breakpoints
334
335 Removes any breakpoints from the UBC, freeing up all channels.
336
337 \note
338 This is automatically called for you upon program termination.
339
340 \sa ubc_remove_breakpoint()
341*/
343
344/** \cond Called internally by KOS. */
345void ubc_init(void);
346void ubc_shutdown(void);
347/** \endcond */
348
349/** @} */
350
351__END_DECLS
352
353#endif /* __DC_UBC_H */
Various common macros used throughout the codebase.
void ubc_clear_breakpoints(void)
Disables all active breakpoints.
bool(* ubc_break_func_t)(const ubc_breakpoint_t *bp, const irq_context_t *ctx, void *user_data)
Breakpoint user callback.
Definition ubc.h:297
ubc_access_t
UBC access condition type specifier.
Definition ubc.h:90
ubc_rw_t
UBC read/write condition type specifier.
Definition ubc.h:102
bool ubc_add_breakpoint(const ubc_breakpoint_t *bp, ubc_break_func_t callback, void *user_data)
Enables a breakpoint.
bool ubc_remove_breakpoint(const ubc_breakpoint_t *bp)
Disables a breakpoint.
ubc_size_t
UBC size condition type specifier.
Definition ubc.h:114
ubc_address_mask_t
UBC address mask specifier.
Definition ubc.h:70
@ ubc_access_instruction
Instruction.
Definition ubc.h:92
@ ubc_access_operand
Operand.
Definition ubc.h:93
@ ubc_access_either
Instruction or operand.
Definition ubc.h:91
@ ubc_rw_either
Read or write.
Definition ubc.h:103
@ ubc_rw_read
Read-only.
Definition ubc.h:104
@ ubc_rw_write
Write-only.
Definition ubc.h:105
@ ubc_size_64bit
Quadword sizes.
Definition ubc.h:119
@ ubc_size_16bit
Word sizes.
Definition ubc.h:117
@ ubc_size_8bit
Byte sizes.
Definition ubc.h:116
@ ubc_size_32bit
Longword sizes.
Definition ubc.h:118
@ ubc_size_any
Any sizes.
Definition ubc.h:115
@ ubc_address_mask_12
Mask off low 12 bits.
Definition ubc.h:73
@ ubc_address_mask_16
Mask off low 16 bits.
Definition ubc.h:74
@ ubc_address_mask_all
Mask off all bits.
Definition ubc.h:76
@ ubc_address_mask_10
Mask off low 10 bits.
Definition ubc.h:72
@ ubc_address_mask_20
Mask off low 20 bits.
Definition ubc.h:75
@ ubc_address_mask_none
Disable masking, all bits used.
Definition ubc.h:71
Interrupt and exception handling.
Architecture-specific structure for holding the processor state.
Definition irq.h:91
UBC breakpoint structure.
Definition ubc.h:138
struct ubc_breakpoint * next
Next breakpoint in the sequence.
Definition ubc.h:278
ubc_size_t size
Size condition.
Definition ubc.h:197
ubc_access_t access
Access type.
Definition ubc.h:159
bool break_before
Break before instruction execution.
Definition ubc.h:178
bool enabled
Enables data value comparisons.
Definition ubc.h:213
ubc_address_mask_t address_mask
Address mask.
Definition ubc.h:153
void * address
Target address.
Definition ubc.h:143
uint32_t value
Data value for operand accesses.
Definition ubc.h:225
ubc_rw_t rw
Read/write condition.
Definition ubc.h:191
uint32_t mask
Exclusion mask for data value comparison.
Definition ubc.h:235
uint8_t value
ASID value.
Definition ubc.h:257