Interrupt and exception handling. More...

#include <stdbool.h>
#include <stdint.h>
#include <sys/cdefs.h>
#include <arch/types.h>
#include <arch/trap.h>

Data Structures
struct	irq_context_t
	Architecture-specific structure for holding the processor state. More...

Macros
#define	REG_BYTE_CNT 256
	The number of bytes required to save thread context.

#define	EXC_OFFSET_000 0
	Offset 0x000.

#define	EXC_OFFSET_100 1
	Offset 0x100.

#define	EXC_OFFSET_400 2
	Offset 0x400.

#define	EXC_OFFSET_600 3
	Offset 0x600.

#define	TIMER_IRQ EXC_TMU0_TUNI0
	The value of the timer IRQ.

#define	irq_disable_scoped() __irq_disable_scoped(__LINE__)
	Disable interrupts with scope management.

Register Accessors
Convenience macros for accessing context registers
#define	CONTEXT_PC(c) ((c).pc)
	Fetch the program counter from an irq_context_t.

#define	CONTEXT_FP(c) ((c).r[14])
	Fetch the frame pointer from an irq_context_t.

#define	CONTEXT_SP(c) ((c).r[15])
	Fetch the stack pointer from an irq_context_t.

#define	CONTEXT_RET(c) ((c).r[0])
	Fetch the return value from an irq_context_t.

Typedefs
typedef uint32_t	irq_mask_t
	Type representing an interrupt mask state.

typedef void(*	irq_handler) (irq_t code, irq_context_t context, void data)
	The type of an IRQ handler.

Enumerations
enum	irq_t { EXC_RESET_POWERON = 0x0000 , EXC_RESET_MANUAL = 0x0020 , EXC_RESET_UDI = 0x0000 , EXC_ITLB_MULTIPLE = 0x0140 , EXC_DTLB_MULTIPLE = 0x0140 , EXC_USER_BREAK_PRE = 0x01e0 , EXC_INSTR_ADDRESS = 0x00e0 , EXC_ITLB_MISS = 0x0040 , EXC_ITLB_PV = 0x00a0 , EXC_ILLEGAL_INSTR = 0x0180 , EXC_SLOT_ILLEGAL_INSTR = 0x01a0 , EXC_GENERAL_FPU = 0x0800 , EXC_SLOT_FPU = 0x0820 , EXC_DATA_ADDRESS_READ = 0x00e0 , EXC_DATA_ADDRESS_WRITE = 0x0100 , EXC_DTLB_MISS_READ = 0x0040 , EXC_DTLB_MISS_WRITE = 0x0060 , EXC_DTLB_PV_READ = 0x00a0 , EXC_DTLB_PV_WRITE = 0x00c0 , EXC_FPU = 0x0120 , EXC_INITIAL_PAGE_WRITE = 0x0080 , EXC_TRAPA = 0x0160 , EXC_USER_BREAK_POST = 0x01e0 , EXC_NMI = 0x01c0 , EXC_IRQ0 = 0x0200 , EXC_IRQ1 = 0x0220 , EXC_IRQ2 = 0x0240 , EXC_IRQ3 = 0x0260 , EXC_IRQ4 = 0x0280 , EXC_IRQ5 = 0x02a0 , EXC_IRQ6 = 0x02c0 , EXC_IRQ7 = 0x02e0 , EXC_IRQ8 = 0x0300 , EXC_IRQ9 = 0x0320 , EXC_IRQA = 0x0340 , EXC_IRQB = 0x0360 , EXC_IRQC = 0x0380 , EXC_IRQD = 0x03a0 , EXC_IRQE = 0x03c0 , EXC_TMU0_TUNI0 = 0x0400 , EXC_TMU1_TUNI1 = 0x0420 , EXC_TMU2_TUNI2 = 0x0440 , EXC_TMU2_TICPI2 = 0x0460 , EXC_RTC_ATI = 0x0480 , EXC_RTC_PRI = 0x04a0 , EXC_RTC_CUI = 0x04c0 , EXC_SCI_ERI = 0x04e0 , EXC_SCI_RXI = 0x0500 , EXC_SCI_TXI = 0x0520 , EXC_SCI_TEI = 0x0540 , EXC_WDT_ITI = 0x0560 , EXC_REF_RCMI = 0x0580 , EXC_REF_ROVI = 0x05a0 , EXC_UDI = 0x0600 , EXC_GPIO_GPIOI = 0x0620 , EXC_DMAC_DMTE0 = 0x0640 , EXC_DMAC_DMTE1 = 0x0660 , EXC_DMAC_DMTE2 = 0x0680 , EXC_DMAC_DMTE3 = 0x06a0 , EXC_DMA_DMAE = 0x06c0 , EXC_SCIF_ERI = 0x0700 , EXC_SCIF_RXI = 0x0720 , EXC_SCIF_BRI = 0x0740 , EXC_SCIF_TXI = 0x0760 , EXC_DOUBLE_FAULT = 0x0ff0 , EXC_UNHANDLED_EXC = 0x0fe0 }
	Interrupt exception codes. More...

Functions
void	irq_set_context (irq_context_t *regbank)
	Switch out contexts (for interrupt return).

irq_context_t *	irq_get_context (void)
	Get the current IRQ context.

void	irq_create_context (irq_context_t context, uint32_t stack_pointer, uint32_t routine, const uint32_t args, bool usermode)
	Fill a newly allocated context block.

int	irq_inside_int (void)
	Returns whether inside of an interrupt context.

irq_mask_t	irq_disable (void)
	Disable interrupts.

void	irq_enable (void)
	Enable all interrupts.

void	irq_restore (irq_mask_t v)
	Restore IRQ state.

void	irq_force_return (void)
	Resume normal execution from IRQ context.

int	irq_set_handler (irq_t code, irq_handler hnd, void *data)
	Set or remove an IRQ handler.

irq_handler	irq_get_handler (irq_t code)
	Get the address of the current handler for the IRQ type.

int	irq_set_global_handler (irq_handler hnd, void *data)
	Set a global exception handler.

irq_handler	irq_get_global_handler (void)
	Get the global exception handler.

Detailed Description

Interrupt and exception handling.

This file contains various definitions and declarations related to handling interrupts and exceptions on the Dreamcast. This level deals with IRQs and exceptions generated on the SH4, versus the asic layer which deals with actually differentiating "external" interrupts.

Author: Megan Potter; Paul Cercueil; Falco Girgis

See also: dc/asic.h, arch/trap.h

Data Structures

Macros

Typedefs

Enumerations

Functions

Detailed Description