asic.h File Reference

Dreamcast ASIC event handling support. More...

#include <sys/cdefs.h>
#include <stdint.h>

Go to the source code of this file.

Macros
#define	ASIC_EVT_PVR_RENDERDONE_VIDEO   0x0000
	Video render stage completed.
#define	ASIC_EVT_PVR_RENDERDONE_ISP   0x0001
	ISP render stage completed.
#define	ASIC_EVT_PVR_RENDERDONE_TSP   0x0002
	TSP render stage completed.
#define	ASIC_EVT_PVR_VBLANK_BEGIN   0x0003
	VBLANK begin interrupt.
#define	ASIC_EVT_PVR_VBLANK_END   0x0004
	VBLANK end interrupt.
#define	ASIC_EVT_PVR_HBLANK_BEGIN   0x0005
	HBLANK begin interrupt.
#define	ASIC_EVT_PVR_YUV_DONE   0x0006
	YUV completed.
#define	ASIC_EVT_PVR_OPAQUEDONE   0x0007
	Opaque list completed.
#define	ASIC_EVT_PVR_OPAQUEMODDONE   0x0008
	Opaque modifiers completed.
#define	ASIC_EVT_PVR_TRANSDONE   0x0009
	Transparent list completed.
#define	ASIC_EVT_PVR_TRANSMODDONE   0x000a
	Transparent modifiers completed.
#define	ASIC_EVT_PVR_DMA   0x000b
	PVR DMA complete.
#define	ASIC_EVT_TA_DMA   0x0013
	TA DMA complete.
#define	ASIC_EVT_PVR_PTDONE   0x0015
	Punch-thrus completed.
#define	ASIC_EVT_PVR_ISP_OUTOFMEM   0x0200
	ISP out of memory.
#define	ASIC_EVT_PVR_STRIP_HALT   0x0201
	Halt due to strip buffer error.
#define	ASIC_EVT_PVR_PARAM_OUTOFMEM   0x0202
	Param out of memory.
#define	ASIC_EVT_PVR_OPB_OUTOFMEM   0x0203
	OPB went past PVR_TA_OPB_END.
#define	ASIC_EVT_PVR_TA_INPUT_ERR   0x0204
	Vertex input error.
#define	ASIC_EVT_PVR_TA_INPUT_OVERFLOW   0x0205
	Vertex input overflowed queue.
#define	ASIC_EVT_GD_COMMAND   0x0100
	GD-Rom Command Status.
#define	ASIC_EVT_GD_DMA   0x000e
	GD-Rom DMA complete.
#define	ASIC_EVT_GD_DMA_OVERRUN   0x020d
	GD-Rom DMA overrun.
#define	ASIC_EVT_GD_DMA_ILLADDR   0x020c
	GD-Rom DMA illegal address.
#define	ASIC_EVT_MAPLE_DMA   0x000c
	Maple DMA complete.
#define	ASIC_EVT_MAPLE_ERROR   0x000d
	Maple error (?)
#define	ASIC_EVT_SPU_DMA   0x000f
	SPU (G2 channel 0) DMA complete.
#define	ASIC_EVT_SPU_IRQ   0x0101
	SPU interrupt.
#define	ASIC_EVT_G2_DMA0   0x000f
	G2 DMA channel 0 complete.
#define	ASIC_EVT_G2_DMA1   0x0010
	G2 DMA channel 1 complete.
#define	ASIC_EVT_G2_DMA2   0x0011
	G2 DMA channel 2 complete.
#define	ASIC_EVT_G2_DMA3   0x0012
	G2 DMA channel 3 complete.
#define	ASIC_EVT_EXP_8BIT   0x0102
	Modem / Lan Adapter.
#define	ASIC_EVT_EXP_PCI   0x0103
	BBA IRQ.
#define	ASIC_ACK_A   0xa05f6900
	IRQD ACK register.
#define	ASIC_ACK_B   0xa05f6904
	IRQB ACK register.
#define	ASIC_ACK_C   0xa05f6908
	IRQ9 ACK register.
#define	ASIC_IRQD_A   0xa05f6910
	IRQD first register.
#define	ASIC_IRQD_B   0xa05f6914
	IRQD second register.
#define	ASIC_IRQD_C   0xa05f6918
	IRQD third register.
#define	ASIC_IRQB_A   0xa05f6920
	IRQB first register.
#define	ASIC_IRQB_B   0xa05f6924
	IRQB second register.
#define	ASIC_IRQB_C   0xa05f6928
	IRQB third register.
#define	ASIC_IRQ9_A   0xa05f6930
	IRQ9 first register.
#define	ASIC_IRQ9_B   0xa05f6934
	IRQ9 second register.
#define	ASIC_IRQ9_C   0xa05f6938
	IRQ9 third register.
#define	ASIC_IRQ9   0
	IRQ level 9.
#define	ASIC_IRQB   1
	IRQ level B (11)
#define	ASIC_IRQD   2
	IRQ level D (13)
#define	ASIC_IRQ_MAX   3
	Don't take irqs from here up.
#define	ASIC_IRQ_DEFAULT   ASIC_IRQ9
	Pick an IRQ level for me!

Typedefs
typedef void(*	asic_evt_handler) (uint32_t code, void *data)
	ASIC event handler type.

Functions
void	asic_evt_set_handler (uint16_t code, asic_evt_handler handler, void *data)
	Set or remove an ASIC handler.
int	asic_evt_request_threaded_handler (uint16_t code, asic_evt_handler handler, void *data, void(*ack_and_mask)(uint16_t), void(*unmask)(uint16_t))
	Register a threaded handler with the given ASIC event.
void	asic_evt_remove_handler (uint16_t code)
	Unregister any handler set to the given ASIC event.
void	asic_evt_disable_all (void)
	Disable all ASIC events.
void	asic_evt_disable (uint16_t code, uint8_t irqlevel)
	Disable one ASIC event.
void	asic_evt_enable (uint16_t code, uint8_t irqlevel)
	Enable an ASIC event.

Detailed Description

Dreamcast ASIC event handling support.

This file provides definitions of the events that the ASIC (a part of the PVR) in the Dreamcast can trigger as IRQs, and ways to set responders for those events. Pretty much, this covers all IRQs that aren't generated internally in the SH4 (SCIF and the SH4 DMAC can generate their own IRQs, as well as the trapa instruction, and various exceptions – those are not dealt with here).

Author

Megan Potter